CEL, INNER S-FTS(NEST)V2

PART DETAILS

2L10-250984-11
CEL, INNER S-FTS(NEST)V2

OEM P/N: 

2L10-250984-11

ESCT P/N: 

ES7099-018

PART TYPE:

2nd Source NEW

OEM: 

TEL
MORE INFO

Inner silicon cathode electrode, nested S-FTS V2 (OEM P/N 2L10-250984-11), inner-zone cathode consumable for TEL 300 mm plasma etch systems

ESCT P/N ES7099-018, 2nd source NEW inner cathode electrode for Tokyo Electron capacitively coupled etch chambers

The Inner Silicon Cathode Electrode (CEL) is a precision-machined high-purity silicon plate that occupies the inner radial zone of the upper electrode assembly in Tokyo Electron (TEL) 300 mm capacitively coupled plasma (CCP) etch chambers. Designated “INNER S-FTS(NEST)V2” in TEL nomenclature, it is the plasma-facing cathode component that sits directly above the central area of the wafer, where it is continuously exposed to RF-driven plasma, reactive process chemistry and energetic ion bombardment. Because the electrode confronts the discharge across its entire active face, its surface condition, flatness and electrical behaviour translate directly into the etch result seen on the substrate below.

The “NEST” descriptor refers to the nested mounting arrangement by which the inner electrode locates concentrically within the surrounding outer electrode and support ring, forming a continuous, gap-controlled cathode surface across the full wafer diameter. The “S-FTS” reference identifies the specific silicon electrode family and its thermal/feed-through structuring, while “V2” marks the second-generation revision of that geometry. As an inner-zone part, this CEL governs the centre of the etch field, complementing the outer electrode that controls behaviour toward the wafer edge.

In day-to-day production, the inner cathode electrode is a managed consumable. Plasma exposure gradually erodes and roughens the silicon, alters surface chemistry and changes the local electrical environment. For this reason the part is replaced on a planned preventive-maintenance interval to hold etch rate, uniformity and particle performance within specification. ESCT Fab Support supplies this electrode as a 2nd Source NEW component, verified to the form, fit and function of the original, with a typical lead time of 4-5 weeks.

Functional role of the inner cathode electrode in TEL plasma etch platforms

As part of the powered or grounded upper electrode in a CCP etch chamber, the inner silicon CEL performs several simultaneous duties that determine how the discharge is generated and shaped over the central region of the wafer. It is far more than a passive plate; it is an active electrical, chemical and thermal interface between the RF circuit and the plasma.

  • Couples RF energy into the plasma across the inner zone, helping to establish and sustain the discharge above the centre of the wafer.
  • Provides a controlled, low-contamination silicon surface that participates in the etch chemistry rather than introducing foreign species into the process.
  • Nests concentrically within the outer electrode to create a continuous cathode plane, maintaining a uniform electrode-to-wafer gap from centre toward edge.
  • Acts as a sacrificial silicon source that can buffer fluorine-rich chemistries and stabilise radical concentrations near the wafer surface.
  • Contributes to plasma confinement and the symmetry of the electric field, supporting centre-to-edge etch uniformity.
  • Conducts process heat away from the discharge region into the supporting structure, helping to stabilise surface temperature during the cycle.

Material and process performance

The performance of an inner cathode electrode is dominated by the grade and finish of its silicon and by how that silicon behaves under sustained plasma and thermal load. Both the bulk material and the worked surface must be controlled to deliver repeatable etch results across the life of the part.

Silicon grade and purity

The electrode is manufactured from high-purity silicon selected to minimise metallic and particulate contamination of the wafer. Tight control of bulk resistivity and trace impurities keeps the electrical coupling consistent and prevents the electrode from acting as a source of defects, which is critical given its position directly over the active device area.

  • High-purity silicon to limit metallic contamination and on-wafer particle adders.
  • Controlled resistivity for predictable, repeatable RF coupling into the inner plasma zone.
  • Stable chemical behaviour in fluorine- and oxygen-bearing etch chemistries.
  • Resistance to thermally driven cracking during rapid power and temperature transitions.

Surface finish and flatness

Surface roughness and overall flatness set the starting point for both particle and uniformity performance. A controlled finish reduces nucleation sites for polymer build-up and flaking, while precise flatness preserves the intended electrode-to-wafer gap and the symmetry of the field across the nested interface.

  • Defined surface roughness to balance deposition adhesion against flake release.
  • Tight flatness and parallelism to hold a uniform gap above the wafer centre.
  • Clean, burr-free edges at the nested interface to avoid local field intensification.
  • Dimensional repeatability so each replacement seats consistently within the assembly.

Impact on tool performance and yield

Because the inner cathode electrode sits at the heart of the discharge over the wafer centre, its condition propagates straight through to device-level results. A worn, contaminated or poorly seated electrode quietly degrades a range of metrics before it produces an outright fault.

  • Drift in centre etch rate and centre-to-edge uniformity as the silicon erodes.
  • Increased on-wafer particle counts from flaking deposits or eroded silicon.
  • Shifts in critical dimension and profile control over the central die.
  • Reduced process-window stability and more frequent chamber re-qualification.
  • Lower mean time between cleans and avoidable unscheduled downtime.
  • Yield loss concentrated in the centre region of the wafer where the inner electrode dominates.

Common wear and failure modes

As a plasma-facing consumable, the inner cathode electrode degrades through predictable mechanisms. Recognising them helps maintenance teams set sensible replacement intervals and avoid surprise excursions.

Plasma erosion and thinning

Continuous ion bombardment and chemical attack steadily consume the silicon face, roughening it and reducing thickness. As the electrode thins, the local gap and electrical coupling change, shifting etch rate and uniformity over the wafer centre and eventually exhausting the usable life of the part.

Polymer build-up and flaking

Process by-products deposit on the electrode surface between cleans. When these layers grow thick or are thermally cycled, they can crack and flake, releasing particles onto the wafer. Build-up also alters surface chemistry and impedance, contributing to slow process drift.

Cracking and seating damage

Silicon is brittle, so thermal shock, mishandling or uneven clamping at the nested interface can initiate chips or cracks. A cracked electrode risks arcing, accelerated erosion and particle generation, while poor seating disturbs the gap symmetry and the RF return path.

Installation and replacement guidance

Replacement should follow TEL-approved chamber procedures and be carried out by trained personnel under appropriate cleanroom and lock-out conditions. The sequence below summarises good practice for changing the inner cathode electrode within the nested upper-electrode assembly.

  • Vent the chamber and confirm RF power is isolated and locked out before opening the lid.
  • Remove the upper electrode hardware in order, noting the position of the outer electrode and any fasteners or clamps.
  • Lift out the worn inner electrode, inspecting the mating and contact surfaces for residue, erosion or damage.
  • Clean the seating area and verify that contact interfaces are free of particles for a reliable RF return path.
  • Fit the new inner CEL using clean gloves and correct handling tools, nesting it concentrically and checking flatness and gap.
  • Reassemble fasteners to the specified torque pattern to avoid stressing or cracking the silicon.
  • Pump down, run seasoning and chamber-qualification recipes, and confirm etch rate, uniformity and particle results before returning to production.

Spare parts strategy for TEL etch consumables

Inner cathode electrodes are consumed on a regular cadence, so they are natural candidates for a managed second-source supply strategy. ESCT Fab Support helps fabs hold uptime and control cost without compromising on quality or traceability.

  • 2nd Source NEW parts verified to the form, fit and function of the original electrode.
  • Cost-effective alternative to single-source OEM procurement for a recurring consumable.
  • Clear cross-referencing against OEM P/N 2L10-250984-11 and ESCT P/N ES7099-018.
  • Predictable lead time of 4-5 weeks to support planned preventive-maintenance scheduling.
  • Support for buffer-stock and consignment arrangements to reduce the risk of line-down events.
  • High-purity silicon sourcing aimed at consistent particle and contamination performance.

Frequently asked questions

What does this inner cathode electrode actually do in the chamber?

It forms the inner zone of the upper electrode (cathode) in a TEL CCP etch chamber, sitting directly above the wafer centre. It couples RF energy into the plasma, provides a controlled silicon surface for the etch chemistry and helps shape the field for uniform centre-to-edge results.

Is this an original TEL OEM part?

No. This electrode is supplied as a 2nd Source NEW, OEM-compatible component. It is a newly manufactured part verified to the form, fit and function of OEM P/N 2L10-250984-11, but it is not an original Tokyo Electron OEM item and is not supplied in OEM packaging.

Why is it described as a consumable?

Plasma exposure continuously erodes the silicon face and changes its surface condition. The electrode is therefore replaced on a planned interval to hold etch rate, uniformity and particle performance within specification, rather than being a permanent fixture.

How does the “NEST” design affect installation?

The inner electrode nests concentrically within the outer electrode and support hardware to create a continuous cathode plane. Correct seating, cleanliness at the contact interfaces and an even clamping pattern maintain gap symmetry and a reliable RF return path.

What is the lead time for ES7099-018?

The typical lead time is 4-5 weeks. Because the part is a recurring consumable, many fabs hold buffer stock or arrange consignment to align replacement with scheduled preventive maintenance and avoid unplanned downtime.

How do I confirm this is the right part for my chamber?

Match against OEM P/N 2L10-250984-11 and ESCT P/N ES7099-018, and confirm it is the inner-zone, V2-revision electrode for your upper-electrode configuration. Our team can help verify compatibility against your specific TEL 300 mm etch chamber and revision before you order.

Summary

The Inner Silicon Cathode Electrode, Nested S-FTS V2 (OEM P/N 2L10-250984-11, ESCT P/N ES7099-018) is a high-purity silicon cathode consumable for Tokyo Electron 300 mm plasma etch chambers. Positioned over the wafer centre, it couples RF energy into the plasma, participates in the etch chemistry and shapes the field for uniform results, making its purity, flatness and surface finish directly relevant to etch rate, uniformity, particle performance and yield. Supplied by ESCT Fab Support as a 2nd Source NEW part with a 4-5 week lead time, it offers a cost-effective, traceable route to maintaining etch performance without single-source dependence.

Disclaimer: This part is supplied by ESCT Fab Support as a new, OEM-compatible second-source component, verified to the form, fit and function of Tokyo Electron part number 2L10-250984-11. It is not an original OEM part and is not sold as one. It is not manufactured by, endorsed by, or affiliated with Tokyo Electron, and all manufacturer names and part numbers are quoted for identification and compatibility purposes only.

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