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The Polysilicon C-Section Ring (LAM OEM P/N 716-081665-601, ESCT P/N ES2099-058) is a plasma-facing consumable machined from high-purity polycrystalline silicon and finished with a distinctive C-section profile that incorporates a 0.10″ (nominal) slot feature. In a 300 mm plasma etch process chamber the ring sits at the periphery of the wafer support assembly, encircling the electrostatic chuck and forming part of the engineered ring stack that surrounds the wafer edge. The C-section geometry is not decorative: the recessed channel and the narrow slot perform specific jobs in seating an adjacent ring, locating an insulator or coupling ring, and shaping the electrostatic and gas-flow environment directly above the wafer bevel.
Because it is fabricated from silicon rather than quartz or a ceramic, this ring is intended to behave as part of the plasma electrode environment. Silicon is chemically similar to the wafer itself, which means it can be consumed in the same etch chemistries without introducing foreign metallic or dielectric contaminants. The 0.10″ slot and the C-shaped cross-section define how the ring interlocks with neighbouring components and how it manages the discontinuity in electric field and gas conductance that always exists at the boundary between the wafer and the chamber hardware.
As a wear item exposed continuously to energetic ions, reactive radicals and elevated temperature, the C-section ring is consumed over its service life and must be replaced on a planned interval. Treating it as a scheduled consumable rather than a fix-on-fail item is central to maintaining tight edge etch uniformity and low on-wafer particle counts across a high-volume manufacturing fleet.
Within the wafer-edge ring stack, the polysilicon C-section ring performs several overlapping electrical, mechanical and process functions that together govern what happens to the outer few millimetres of every wafer processed in the chamber.
Polycrystalline silicon is selected for edge consumables precisely because it is the same element as the substrate. It etches in fluorine- and chlorine-based chemistries to form volatile by-products rather than non-volatile residues, and it does not shed metallic ions that would compromise device yield. High-purity poly-Si with controlled grain structure and low trace-metal content also offers predictable, repeatable erosion, which is what allows the ring to be qualified for a known number of RF hours before replacement.
The C-section profile and the 0.10″ slot must be held to tight dimensional tolerance because they set the mechanical fit and the gas/electrical gaps within the ring stack. Surface finish on the plasma-facing face is equally important: a controlled finish reduces nucleation sites for polymer build-up and slows micro-roughening under ion bombardment, directly extending usable life and reducing particle shedding late in the service interval.
Because this ring sits at the boundary where edge yield is won or lost, its condition has a direct and measurable effect on device output. A ring that is worn, cracked or incorrectly seated translates almost immediately into edge-zone process drift and particle excursions.
The dominant failure mechanism is gradual consumption. Continuous ion bombardment and chemical etching slowly reduce the section thickness and open up the C-channel and 0.10″ slot dimensions. As the geometry recedes, the edge gap and field profile drift out of their qualified window, and the surface roughens, increasing both process variability and particle generation toward end of life.
Silicon is brittle, so thermal-cycling stress, mechanical mishandling during installation, or an over-torqued or poorly seated stack can initiate cracks and edge chips, particularly around the thin slot feature. Once a crack forms it acts as a particle source and a local field discontinuity, and it can propagate quickly under repeated RF and thermal load, leading to sudden component failure.
In polymerising chemistries, etch by-products accumulate on the ring surface and within the slot. If deposits are not removed at the correct preventive-maintenance interval they eventually delaminate and flake, producing defect-killing particles on the wafer and disturbing the local gas conductance the slot is meant to control.
Replacement should be carried out during scheduled preventive maintenance, by a trained technician following the relevant tool procedure and contamination-control practice. The following sequence summarises good practice for a brittle silicon edge consumable.
Edge consumables such as the C-section ring are recurring spend and recurring risk: every chamber needs replacements on a predictable cadence, and a stock-out can idle a high-value tool. Sourcing this part through ESCT Fab Support lets fabs control that cost and risk without compromising on form, fit and function.
The C-shaped cross-section forms a channel that seats and locates an adjacent ring or insulator within the edge stack, while the 0.10″ slot sets a controlled gap for gas conductance, thermal isolation or mechanical clearance against its mating component. Together they fix the ring’s position and shape the local electrical and gas environment at the wafer edge.
No. This is supplied as a second-source new part, manufactured to match the form, fit and function of LAM OEM P/N 716-081665-601. It is not an original OEM component and is not sold as one; it is offered as a fully compatible alternative under ESCT P/N ES2099-058.
Silicon is chemically and electrically similar to the wafer, so it extends wafer-like conditions to the wafer edge and is consumed in the same chemistries without introducing metallic or dielectric contamination. Quartz and ceramics serve different roles in the chamber, but for a silicon-compatible edge electrode environment, poly-Si is the appropriate material.
Replacement intervals are set by RF hours, wafer count or process recipe and vary between fabs. The ring should be changed at the qualified preventive-maintenance interval, or sooner if edge uniformity drifts, particle counts rise, or inspection reveals cracking, chipping or excessive section thinning.
The current lead time is 4–5 weeks. Because this is a recurring consumable, we recommend holding safety stock and placing replenishment orders against your known PM cadence so that a chamber is never held waiting on an edge ring.
Match the LAM OEM P/N 716-081665-601 and the ESCT P/N ES2099-058 against your tool’s bill of materials and confirm the ring’s position within your specific edge-ring stack. If you are unsure, our team can help cross-reference the part against your configuration before you order.
The Polysilicon C-Section Ring (LAM OEM P/N 716-081665-601, ESCT P/N ES2099-058) is a precision plasma-facing edge consumable for 300 mm plasma etch chambers. Its silicon construction, C-section profile and 0.10″ slot work together to extend wafer-like conditions to the wafer edge, locate the surrounding ring stack and protect chamber hardware, while governing edge etch uniformity, plasma confinement and particle performance. As a wear item, it benefits from disciplined PM scheduling and reliable resupply. ESCT Fab Support offers it as a second-source new, form-fit-function alternative with competitive pricing and a defined 4–5 week lead time to keep your etch tools running.
Disclaimer: This part is supplied by ESCT Fab Support as a new, OEM-compatible second-source component, verified to the form, fit and function of Lam Research part number 716-081665-601. It is not an original OEM part and is not sold as one. It is not manufactured by, endorsed by, or affiliated with Lam Research, and all manufacturer names and part numbers are quoted for identification and compatibility purposes only.
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