3D10-250317-21
CEL, OUTER, SH-OX,RP470-0.2

Outer CEL silicon electrode ring (OEM P/N 3D10-250317-21), upper-electrode edge ring for TEL 300 mm plasma etch systems

ESCT P/N ES7099-006, outer cell (CEL) silicon electrode ring, 2nd-source new, OEM form-fit-function compatible with Tokyo Electron upper-electrode assemblies

The Outer CEL Silicon Electrode Ring is an annular silicon consumable that forms the outermost element of the upper-electrode “cell” (CEL) assembly in Tokyo Electron 300 mm plasma etch chambers. In TEL nomenclature the CEL group comprises the central silicon electrode and the concentric rings that frame it; this part is the outer ring of that group, with the “SH-OX” designation referring to its position around the showerhead-style gas-distribution electrode and its oxidised, etch-grade silicon construction. It sits at the upper boundary of the plasma volume, encircling the powered or grounded electrode disc directly above the wafer.

Because it occupies the edge of the upper electrode, the outer CEL ring does far more than simply hold the central electrode in place. It defines the outer diameter of the conductive electrode surface seen by the plasma, extends the equipotential field to the chamber wall region, and acts as a sacrificial silicon surface that participates in the same fluorine and oxygen chemistries as the wafer itself. The “RP470-0.2” suffix denotes a specific ring profile and a nominal thickness step measured in millimetres, dimensions that are tightly controlled because they set the gap geometry and the field-shaping behaviour at the chamber periphery.

As a high-purity silicon part exposed continuously to ion bombardment and reactive radicals, the outer CEL ring is a scheduled-replacement consumable. Its condition has a direct and measurable effect on edge etch rate, on particle counts and on the cleanliness of the spectra of by-products generated in the chamber, which is why fabs track its erosion closely and stock it as a recurring spare.

Functional role of the outer CEL ring in TEL etch platforms

Within the upper-electrode stack, the outer CEL ring performs several inter-related electrical, chemical and mechanical functions that together stabilise the plasma above the wafer edge:

• Extends the conductive silicon surface of the upper electrode radially outward, fixing the outer diameter of the active electrode area seen by the discharge.
• Shapes the electric field and equipotential lines at the chamber periphery so that the sheath remains uniform out to the wafer edge.
• Provides a sacrificial high-purity silicon surface that consumes reactive fluorine and oxygen species in a controlled, scavenging manner, keeping by-product chemistry consistent.
• Confines and frames the plasma at the upper boundary, helping to prevent the discharge from spreading onto non-silicon surfaces such as anodised aluminium hardware.
• Concentrically locates and protects the central CEL electrode and any inner rings, maintaining the designed electrode-to-wafer gap.
• Supports an RF and thermal return path at the top of the chamber, contributing to stable impedance and predictable upper-electrode temperature.

Material and process performance

Silicon purity and erosion behaviour

The ring is manufactured from etch-grade high-purity silicon selected to match the electrical resistivity and chemical behaviour of the original CEL component. Purity is critical because any metallic contamination liberated as the silicon erodes will deposit on the wafer and degrade device yield. Controlled erosion is in fact part of the design intent: the silicon is meant to be consumed slowly and evenly, scavenging fluorine and contributing to a repeatable plasma chemistry.

• High-purity, low-metals silicon to minimise wafer contamination during erosion.
• Resistivity matched to the CEL electrode so the field-shaping role is preserved.
• Even, predictable surface recession that supports long, stable process campaigns.

Dimensional and surface tolerances

The RP470-0.2 profile fixes the ring’s inner and outer diameters, flatness and thickness step to tolerances that determine the upper-electrode gap and the seating of the central electrode. Surface finish is equally important: a consistent, low-roughness face limits localised field enhancement and slows particle generation as the ring ages.

• Tight flatness and parallelism to maintain a uniform electrode-to-wafer gap.
• Controlled thickness step so the ring seats correctly against adjacent CEL hardware.
• Consistent surface finish to suppress arcing sites and particle shedding.

Impact on tool performance and yield

Because the outer CEL ring sits directly in the field-shaping and chemistry-scavenging path above the wafer edge, its condition propagates straight into device-level results:

• Edge etch-rate uniformity and critical-dimension control at the wafer periphery.
• Centre-to-edge process matching across the chamber and between chambers.
• Particle performance and defect density, which drive yield directly.
• Plasma stability and RF impedance repeatability at the top of the chamber.
• Consistency of by-product chemistry, and hence the reliability of endpoint detection.
• Mean time between wet-cleans and the overall preventive-maintenance interval.

Common wear and failure modes

Erosion and thinning

The dominant wear mode is gradual recession of the silicon surface under ion bombardment and chemical attack. As the ring thins, the upper-electrode gap and field geometry shift, edge etch rates drift and the silicon’s fluorine-scavenging capacity falls, all of which push the process away from its qualified centre point.

Cracking and chipping

Silicon is brittle, so thermal cycling, mechanical handling and uneven clamping can initiate hairline cracks or edge chips. These not only weaken the ring but become point sources of particles and can cause localised arcing, frequently forcing an unscheduled chamber-open.

Surface roughening and deposition

Over a campaign the exposed face roughens and can accumulate polymer or by-product films. Roughened or flaking surfaces shed particles, alter the local field and degrade the cleanliness of the spectra used for endpoint and chamber monitoring, signalling that replacement is due.

Installation and replacement guidance

The outer CEL ring is replaced during a scheduled upper-electrode preventive-maintenance event. Always follow the approved TEL maintenance procedure and your fab’s contamination-control practices; the sequence below is a general guide:

• Place the tool in maintenance mode, vent the chamber to atmosphere and confirm RF and gas lockout/tagout before opening the lid.
• Open the upper-electrode assembly and record the as-found condition of the CEL group for erosion tracking.
• Carefully remove the worn outer CEL ring, supporting the brittle silicon to avoid chipping, and clean the seating surfaces and adjacent hardware.
• Handle the new ES7099-006 ring only with clean, lint-free gloves or approved tooling; avoid contact that could transfer metals or oils to the silicon.
• Seat the ring concentrically against the central electrode, verifying correct orientation, even seating and the specified gap.
• Reassemble the upper electrode, restore vacuum, leak-check and run the required chamber-conditioning or season recipe.
• Requalify with particle, etch-rate and uniformity checks before returning the chamber to production.

Spare parts strategy for TEL etch consumables

As a recurring consumable, the outer CEL ring should be held in inventory so a worn part never becomes the gating item in a preventive-maintenance window. ESCT Fab Support supplies this ring as a 2nd-source, form-fit-function alternative that lets fabs diversify supply without changing their process:

• New 2nd-source silicon verified to the original form, fit and function, supporting supply-chain resilience.
• Clear cross-reference to OEM P/N 3D10-250317-21 and ESCT P/N ES7099-006 for accurate ordering.
• High-purity material selection to protect wafer-level defect and contamination budgets.
• A typical lead time of 4-5 weeks, allowing the part to be folded into planned PM cycles.
• Application support to confirm suitability for your specific chamber configuration.

Frequently asked questions

What does the outer CEL ring actually do in the chamber?

It is the outermost silicon element of the upper-electrode cell assembly. It extends the conductive electrode surface to its outer diameter, shapes the field at the wafer edge, and acts as a sacrificial silicon surface that scavenges reactive species, all of which stabilise edge etch uniformity and particle performance.

Is this an original TEL OEM part?

No. This is a new 2nd-source component supplied by ESCT Fab Support. It is not an original Tokyo Electron OEM part, but it is manufactured and verified to match the original in form, fit and function for the relevant upper-electrode assemblies.

What material is the ring made from?

It is made from etch-grade high-purity silicon with resistivity matched to the original CEL electrode. The low metallic content minimises the contamination risk as the silicon is slowly consumed during normal plasma operation.

How often does it need replacing?

Replacement interval depends on process chemistry, RF power and chamber duty cycle. The ring is a scheduled consumable, so most fabs tie its replacement to a defined erosion limit or to the upper-electrode preventive-maintenance cycle rather than to a fixed calendar date.

What happens if a worn ring is left in service?

Excessive thinning shifts the electrode gap and field shape, drifting edge etch rates and degrading centre-to-edge uniformity. Roughened, cracked or chipped silicon also raises particle counts and arcing risk, which can scrap wafers and force an unplanned chamber-open.

What information do I need to order the correct ring?

Quote ESCT P/N ES7099-006 or OEM P/N 3D10-250317-21 along with your tool model and chamber configuration. Our team can confirm compatibility before you order so the ring drops straight into your planned maintenance.

Summary

The Outer CEL Silicon Electrode Ring (OEM P/N 3D10-250317-21, ESCT P/N ES7099-006) is the outermost silicon element of the upper-electrode cell assembly in TEL 300 mm plasma etch chambers. It defines the outer edge of the electrode surface, shapes the peripheral field, scavenges reactive species and locates the central electrode, making it a key driver of edge etch uniformity, particle performance and plasma stability. As a sacrificial, high-purity silicon consumable it wears predictably and is best held as a stocked spare. Supplied by ESCT Fab Support as a new 2nd-source, form-fit-function alternative with a typical 4-5 week lead time, it offers a dependable, contamination-conscious option for keeping TEL etch chambers in qualified production.

Disclaimer: This part is supplied by ESCT Fab Support as a new, OEM-compatible second-source component, verified to the form, fit and function of Tokyo Electron part number 3D10-250317-21. It is not an original OEM part and is not sold as one. It is not manufactured by, endorsed by, or affiliated with Tokyo Electron, and all manufacturer names and part numbers are quoted for identification and compatibility purposes only.

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